The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Nov. 05, 2014
Applicant:

Knowles Electronics, Llc, Itasca, IL (US);

Inventors:

Dibyendu Nandy, Naperville, IL (US);

Robert A. Popper, Lemont, IL (US);

Yang Li, Schaumburg, IL (US);

Sarmad Qutub, DesPlaines, IL (US);

Claus Erdmann Furst, Roskilde, DK;

Henrik Thomsen, Holte, DK;

Assignee:

KNOWLES ELECTRONICS, LLC, Itasca, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G10L 25/78 (2013.01); H04R 3/00 (2006.01); G10L 15/00 (2013.01); H04R 19/00 (2006.01); H04R 19/04 (2006.01);
U.S. Cl.
CPC ...
G10L 25/78 (2013.01); G10L 15/00 (2013.01); H04R 3/005 (2013.01); H04R 19/005 (2013.01); H04R 19/04 (2013.01);
Abstract

First analog signals are received from a first microphone, converted into first digital data and stored in a first buffer. A determination is made as to whether voice activity has occurred when voice activity is determined, a voice activity detect signal is sent to an external processor. The external processor responsively provides an exterior clock signal upon receiving the voice activity detect signal. Second analog signals are received from a second microphone, converted into second digital data and stored in a second buffer. The first digital data in the first buffer is not necessarily synchronized in real time with the second digital data in the second buffer. The first digital data from the first buffer and the second digital data from the second buffer is decimated using the external clock to provide decimated output data, the decimated output data having the first digital data and the second digital data aligned in real time.


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