The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2015

Filed:

Mar. 15, 2013
Applicant:

Honda Motor Co., Ltd., Tokyo, JP;

Inventors:

Keisuke Korekado, Wako, JP;

Tomoyuki Kamiyama, Wako, JP;

Nobuyuki Ohashi, Wako, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01C 3/08 (2006.01); G01S 17/10 (2006.01); G01S 7/484 (2006.01); G01S 7/486 (2006.01); G01S 7/497 (2006.01);
U.S. Cl.
CPC ...
G01C 3/08 (2013.01); G01S 7/484 (2013.01); G01S 7/4865 (2013.01); G01S 7/497 (2013.01); G01S 17/10 (2013.01);
Abstract

A light emission reference signal, the timing of which is adjusted by a first delay time control circuit, is input as a timing adjustment signal to a light emitter driver. The light emission reference signal, which is delayed by a second delay time control circuit, is output as an offset signal. The offset signal and a light emission timing signal from the light emitter driver are input to a timing correction phase comparator, and a phase comparison result is output from the timing correction phase comparator. The phase comparison result is input to a timing correction control logic circuit, and a delay adjusting signal based on the phase comparison result is output from the timing correction control logic circuit. The delay adjusting signal is input to the first delay time control circuit, whereby the timing of the light emission reference signal is adjusted.


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