The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Jun. 21, 2012
Applicant:

Robert A. Alfieri, Chapel Hill, NC (US);

Inventor:

Robert A. Alfieri, Chapel Hill, NC (US);

Assignee:

NVIDIA CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 3/46 (2006.01); H04L 7/033 (2006.01); H04L 7/02 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0337 (2013.01); H04L 7/02 (2013.01);
Abstract

One embodiment sets forth a technique for deterministic synchronization of signals that are transmitted between different clock domains. The relative phase difference between a source clock domain and a destination clock domain is characterized and the source clock and/or the destination clock are delayed as needed to generate phase-shifted versions of the source and destination clocks for use during a deterministic operating mode. The phase-shifted versions of the source and destination clocks are non-overlapping, meaning that the rising edge of the destination clock does not occur when the source clock is asserted. The non-overlapping source and destination clocks are used by a deterministic synchronization unit to ensure that signals being transmitting from the source clock domain to the destination clock domain are not sampled within a metastability window.


Find Patent Forward Citations

Loading…