The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9106249 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 11, 2015

Filed:

Sep. 04, 2014
Applicant:

Semtech Corporation, Camarillo, CA (US);

Inventors:

Kenneth Colin Dyer, Pleasanton, CA (US);

Jayant Vivrekar, San Jose, CA (US);

Assignee:

Semtech Corporation, Camarillo, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/12 (2006.01); H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1295 (2013.01); H03M 1/002 (2013.01);
Abstract

Examples are provided for a method and apparatus for calibration of an analog-to-digital converter (ADC) including multiple sub-ADCs. The method includes applying a calibration signal to an input node of each sub-ADC. For each sub-ADC, a corresponding error signal is generated based on output signals of the sub-ADC and a reference sub-ADC. Each sub-ADC is calibrated based on the corresponding error signal. The reference sub-ADC is selected by: applying a non-zero input voltage signal to the input node of each sub-ADC, measuring a corresponding output signal of each sub-ADC in response to the non-zero input voltage signal, generating a deviation error based on a subtraction of a stored value from the measured output signal of each sub-ADC, and designating as the reference sub-ADC a sub-ADC from the multiple sub-ADCs based on the deviation error.


Find Patent Forward Citations

Loading…