The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2015
Filed:
Apr. 01, 2014
Applicant:
Maxim Integrated Products, Inc., San Jose, CA (US);
Inventors:
Marvin L. Peak, Jr., Highland Villiage, TX (US);
Bradley M. Harrington, Carrollton, TX (US);
Matthew R. Harrington, Carrollton, TX (US);
Assignee:
Maxim Integrated Products, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01H 47/00 (2006.01); H02M 7/217 (2006.01);
U.S. Cl.
CPC ...
H02M 7/217 (2013.01);
Abstract
A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal.