The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2015
Filed:
Feb. 08, 2011
Applicants:
Gabriele Barlocchi, Cornaredo, IT;
Pietro Corona, Milan, IT;
Flavio Francesco Villa, Milan, IT;
Inventors:
Assignee:
STMicroelectronics S.r.l., Agrate Brianza (MB), IT;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 21/762 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76264 (2013.01); H01L 21/7682 (2013.01);
Abstract
A process for manufacturing a semiconductor wafer including SOI-insulation wells includes forming, in a die region of a semiconductor body, buried cavities and semiconductor structural elements, which traverse the buried cavities and are distributed in the die region. The process moreover includes the step of oxidizing selectively first adjacent semiconductor structural elements, arranged inside a closed region, and preventing oxidation of second semiconductor structural elements outside the closed region, so as to form a die buried dielectric layer selectively inside the closed region.