The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Dec. 10, 2012
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Byoung Hoon Lee, Seoul, KR;

Chang Moon Lim, Seoul, KR;

Assignee:

SK HYNIX INC., Icheon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/108 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66666 (2013.01); H01L 27/10876 (2013.01); H01L 27/10888 (2013.01); H01L 29/7827 (2013.01); H01L 27/0207 (2013.01); H01L 27/10885 (2013.01);
Abstract

In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.


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