The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Dec. 11, 2013
Applicant:

Imec, Leuven, BE;

Inventors:

Philippe Soussan, Leuven, BE;

Melina Lofrano, Kumtich, BE;

Assignee:

IMEC, Leuven, BE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 23/48 (2006.01); H01L 27/06 (2006.01); H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 21/18 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49544 (2013.01); H01L 21/185 (2013.01); H01L 23/49506 (2013.01); H01L 23/562 (2013.01); H01L 21/6835 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 2221/6835 (2013.01); H01L 2221/68363 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05569 (2013.01); H01L 2224/10125 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/81005 (2013.01); H01L 2224/81007 (2013.01); H01L 2224/81193 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01);
Abstract

A method for flip chip bonding a GaN device formed on a silicon substrate is described. The method includes providing a silicon substrate having a GaN device thereon, the GaN device comprising at least one gallium-nitride layer near the silicon substrate and remote from the silicon substrate a dielectric layer comprising at least one via configured to electrically contact the at least one gallium-nitride layer, forming a stiffener layer over the GaN device leaving the at least one via exposed, flip chip bonding the GaN device to a submount, wherein the stiffener layer physically contacts the submount and the submount is electrically connected to the at least gallium-nitride layer through the via, and completely removing the silicon substrate exposing the GaN device. Preferably, the material of the stiffener layer comprises silicon, such as silicon, silicon-germanium, or silicon-carbide.


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