The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2015
Filed:
Oct. 19, 2010
John Ladd, San Jose, CA (US);
Satyadev Nagaraja, San Jose, CA (US);
John Ladd, San Jose, CA (US);
Satyadev Nagaraja, San Jose, CA (US);
SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, Phoenix, AZ (US);
Abstract
This is generally directed to a switchable impedance to ground. In particular, a pixel array can be coupled to and surrounded by a ground ring. The ground ring can be coupled to a switchable impedance to ground. During a correlated double sampling ('CDS') phase of the pixel array, the switchable impedance can be set to a high resistance value. For example, the switchable impedance can be set to 500 ohms. During an analog-to-digital conversion ('ADC') readout phase of the pixel array, however, the switchable impedance can be set to a low resistance value. For example, the switchable impedance can be set to 1-10 ohms. Setting the switchable impedance to the high impedance value during the CDS phase can prevent imaging errors such as black hole artifacts. Setting the switchable impedance to the low impedance value during the ADC readout phase can, for example, prevent errors due to ground drift.