The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Dec. 10, 2013
Applicants:

Stmicroelectronics (Research & Development) Limited, Marlow, Buckinghamshire, GB;

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Andrew Michael Jones, Bristol, GB;

Stuart Ryan, Bristol, GB;

Alberto Scandurra, Messina, IT;

Assignees:

STMicroelectronics (Research & Development) Limited, Marlow, Buckinghamshire, GB;

STMicroelectronics S.r.l., Agrate Brianza (MB), IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/538 (2006.01); G06F 13/16 (2006.01); G11C 7/10 (2006.01); H04N 21/426 (2011.01);
U.S. Cl.
CPC ...
G11C 7/10 (2013.01); G06F 13/16 (2013.01); H01L 23/5383 (2013.01); H01L 25/0655 (2013.01); H04N 21/426 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/15311 (2013.01); Y02B 60/1228 (2013.01);
Abstract

A package includes a first die and a second die. An interface connects the first die and the second die. At least one of the first and second dies includes a memory. The interface is configured to transport both control signals and memory transactions. A multiplexing circuit multiplexes the control signals and the memory transactions onto the interface such that connections of the interface are shared by the control signals and the memory transactions.


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