The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2015

Filed:

Jul. 16, 2014
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Yael Shur, Tel Aviv, IL;

Yoav Kasorla, Kfar Netar, IL;

Eyal Gurgi, Petah-Tikva, IL;

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/00 (2006.01); G11C 13/00 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/32 (2006.01); G11C 27/00 (2006.01);
U.S. Cl.
CPC ...
G11C 7/00 (2013.01); G11C 13/0002 (2013.01); G11C 13/004 (2013.01); G11C 13/0061 (2013.01); G11C 13/0069 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/32 (2013.01); G11C 27/005 (2013.01);
Abstract

A method includes selecting a word line for programming in an array of analog memory cells that are arranged in rows associated with respective word lines and columns associated with respective bit lines. Word-line voltages, which program the memory cells in the selected word line, are applied to the respective word lines. Bit-line voltages, which cause one or more additional memory cells outside the selected word line to be programmed as a result of programming the selected word line, are applied to the respective bit lines. Using the applied word-line and bit-line voltages, data is stored in the memory cells in the selected word line and the additional memory cells are simultaneously programmed.


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