Method of reducing current leakage in a product variant of a semiconductor device

Abstract

A method of reducing current leakage in product variants of a semiconductor device, during the fabrication of the semiconductor device. The method involves using a semiconductor process technique for reducing current leakage in semiconductor product variants having unused circuits. A semiconductor device or integrated circuit fabricated by this method has reduced current leakage upon powering as well as during operation. The method involves semiconductor process technique that substantially increases the V(threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The semiconductor process technique is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for unused circuits having previously applied semiconductor process techniques, such as a high Vcircuit, a standard Vcircuit, a low Vcircuit, and an SRAM cell Vcircuit.