The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2015
Filed:
Mar. 13, 2013
Silicon Graphics International Corp., Fremont, CA (US);
Rodney A. Ruesch, Eau Claire, WI (US);
Eric C. Fromm, Eau Claire, WI (US);
Robert W. Cutler, Chippewa Falls, WI (US);
Richard G. Finstad, Eau Claire, WI (US);
Dale R. Purdy, Apple Valley, MN (US);
Brian J. Johnson, Rosemount, MN (US);
John F. Steiner, Mendota Heights, MN (US);
Silicon Graphics International Corp., Milpitas, CA (US);
Abstract
Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.