The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9100229 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 04, 2015

Filed:

Sep. 25, 2013
Applicant:

Lsi Corporation, San Jose, CA (US);

Inventors:

Tai Jing, Los Altos, CA (US);

Hairong Gao, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 25/06 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 25/03057 (2013.01); H04L 2025/03789 (2013.01);
Abstract

A method of calibrating data slicer-latches in a receiver to remove offset errors in the slicer-latches. A known voltage is applied to all but one of the inputs of the slicer-latch. The remaining input receives an offset cancelation voltage from a DAC is stepped upward from a minimum voltage until the slicer-latch output transitions by incrementing a codeword to the DAC and the codeword that resulted the transition is saved. Then the offset cancelation voltage is swept downward in steps from a maximum voltage until the slicer-latch output transitions and the codeword that caused the transition is averaged with the stored codeword. The average of the codewords is applied to the DAC to generate the offset cancelation voltage used during normal operation of the receiver.


Find Patent Forward Citations

Jing, Tai. (2015). Method of calibrating a slicer in a receiver or the like (U.S. Patent No. 9100229). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9100229

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