The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2015
Filed:
Jun. 08, 2011
Ramasamy Ramanathan, Santa Clara, CA (US);
Pankaj Shukla, San Jose, CA (US);
Sunesh Rustagi, San Jose, CA (US);
Ramasamy Ramanathan, Santa Clara, CA (US);
Pankaj Shukla, San Jose, CA (US);
Sunesh Rustagi, San Jose, CA (US);
Juniper Networks, Inc., Sunnyvale, CA (US);
Abstract
In general, techniques are described for synchronizing gateway layer two (L2) addresses of routers that cooperate to provide interconnectivity to multiple, separate L2 networks. In one example, a router includes a VPLS module that establishes a VPLS instance to provide L2 connectivity between a local L2 network for the router and a remote L2 network for the router, wherein the router is addressable by a gateway L2 address. A synchronization module receives a gateway L2 address synchronization message that includes an additional gateway L2 address for an additional router. An integrated routing and bridging (IRB) interface of the router receives a L2 PDU from the local L2 network on an attachment circuit for the VPLS instance attached to the interface card, and a forwarding unit routes a layer three (L3) packet carried by the PDU when the PDU has an L2 destination address that matches the additional gateway L2 address.