The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Sep. 06, 2012
Applicants:

Ryusuke Nebashi, Tokyo, JP;

Noboru Sakimura, Tokyo, JP;

Yukihide Tsuji, Tokyo, JP;

Tadahiko Sugibayashi, Tokyo, JP;

Inventors:

Ryusuke Nebashi, Tokyo, JP;

Noboru Sakimura, Tokyo, JP;

Yukihide Tsuji, Tokyo, JP;

Tadahiko Sugibayashi, Tokyo, JP;

Assignee:

NEC CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/173 (2006.01); H03K 19/177 (2006.01); H03K 19/18 (2006.01); G11C 11/16 (2006.01); G11C 19/08 (2006.01);
U.S. Cl.
CPC ...
H03K 19/17764 (2013.01); G11C 11/16 (2013.01); G11C 11/1675 (2013.01); G11C 19/0808 (2013.01); H03K 19/1776 (2013.01); H03K 19/18 (2013.01);
Abstract

Provided is a nonvolatile resistor network assembly characterized by that: it comprises a first and a second resistor network which are each composed of a plurality of nonvolatile resistive elements connected together; it also comprises a write means for writing into the first and second resistor networks; and writing into the first and second resistor networks is performed by the use of the write means in a manner to make total resistances of respectively the first and second resistor networks different from each other. Further provided is a nonvolatile logic gate which performs logical operation using stored data determined by the total resistances of the respective nonvolatile resistor networks.


Find Patent Forward Citations

Loading…