The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 04, 2015
Filed:
Mar. 14, 2013
Altera Corporation, San Jose, CA (US);
Tze Sin Tan, Pulau Pinang, MY;
Chin Hai Ang, Pulau Pinang, MY;
Altera Corporation, San Jose, CA (US);
Abstract
An integrated circuit device has first and memory that use first and second normal mode clocks with differing clock domains. A first switching circuit selectively outputs to the first memory the first normal mode clock when the normal mode is selected or the initial test clock as a first test clock when a testing mode is selected, and a second switching circuit selectively outputs to the second memory the second normal mode clock when the normal mode is selected or the test clock as a second test clock when the testing mode is selected. A built-in-self-test switching circuit receives and outputs the first test clock when the first memory is being tested or the second test clock when the second memory is being tested, and a built-in-self-test circuit receives and uses the first test clock for testing the first memory or the second test clock for testing the second memory.