The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Oct. 24, 2012
Applicants:

Mukesh Chhabra, New Delhi, IN;

Prashant Vashisht, Gurgaon, IN;

Mohit Batra, Delhi, IN;

Rajneesh Mishra, Ghaziabad, IN;

Inventors:

Mukesh Chhabra, New Delhi, IN;

Prashant Vashisht, Gurgaon, IN;

Mohit Batra, Delhi, IN;

Rajneesh Mishra, Ghaziabad, IN;

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/58 (2006.01); G06F 13/12 (2006.01); H04L 12/803 (2013.01); H04L 12/931 (2013.01);
U.S. Cl.
CPC ...
G06F 13/124 (2013.01); H04L 47/125 (2013.01); H04L 49/00 (2013.01);
Abstract

Line cards in a multi-slot network element utilize load balancing systems and methods for synchronizing learned Media Access Control (MAC) addresses therebetween. It is an objective of the load balancing systems and methods to enable high data rate scalability between line cards in a distributed system while preventing adverse effects on packet traffic. The load balancing systems and methods include inter alia MAC address updates between data path devices (e.g., network processors, application specific integrated circuits, etc.) using data frames and a hash-based time slot strategy ensuring MAC address updates are distributed over time as opposed to large scale, singular events.


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