The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2015
Filed:
Nov. 13, 2013
Kabushiki Kaisha Nihon Micronics, Tokyo, JP;
Yoshiyuki Fukami, Tokyo, JP;
Toshinori Omori, Tokyo, JP;
Katsushi Mikuni, Tokyo, JP;
Noriko Kon, Tokyo, JP;
KABUSHIKI KAISHA NIHON MICRONICS, Tokyo, JP;
Abstract
Provided is a method for manufacturing a multi-layer wiring board and the multi-layer wiring board that are capable of suppressing variation in resistance values. The method according to the present invention is the method for manufacturing a multi-layer wiring board. The method includes forming a resistor thin film, measuring resistance distribution of the resistor thin film, calculating resistor width adjustment rates of the plurality of resistors according to the resistance distribution, forming a pattern of a protective film on the resistor thin film, in which the pattern of the protective pattern has pattern width according to the resistor width adjustment rate, forming a pattern of a plating film on the resistor thin film at a position exposed from the protective film, and etching the resistor thin film at a position exposed from the plating film and the protective film so as to pattern the resistor thin film.