The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2015

Filed:

Nov. 26, 2012
Applicants:

Michel Thill, Meudon, FR;

Yan Charles, Meudon, FR;

Yvon Gressus, Meudon, FR;

Inventors:

Michel Thill, Meudon, FR;

Yan Charles, Meudon, FR;

Yvon Gressus, Meudon, FR;

Assignee:

GEMALTO SA, Meudon, FR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06K 19/07 (2006.01); G06K 19/077 (2006.01); G06F 1/16 (2006.01); H04B 5/00 (2006.01);
U.S. Cl.
CPC ...
H04B 5/0031 (2013.01); G06F 1/1633 (2013.01); G06K 19/0701 (2013.01); G06K 19/072 (2013.01); G06K 19/0715 (2013.01); G06K 19/07769 (2013.01);
Abstract

The embodiments of this invention relate to an electronic device () intended to be installed in a portable device (), which electronic device comprises: • a microcontroller () configured to communicate with a first interface () of the portable device in accordance with a first protocol, the said first interface () supplying power voltage to the microcontroller, the said power voltage being standardised by the said first protocol, • a secure electronic chip component () configured to communicate with a second interface () of the portable device in accordance with a second protocol, the said second interface () supplying power voltage to the secure component, the said power voltage being standardised by the said second protocol, • means for communication () between the secure component () and the microcontroller (), in which the means for communication comprise a module for voltage adaptation () depending on the power voltages supplied by the first and second interfaces.


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