The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2015
Filed:
May. 24, 2013
The Board of Trustees of the University of Arkansas, Little Rock, AR (US);
Scott C. Smith, Rogers, AR (US);
Jia Di, Fayetteville, AR (US);
Jerry Frenkil, Concord, MA (US);
Aaron Arthurs, Springdale, AR (US);
Ron Foster, Fayetteville, AR (US);
THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS, Little Rock, AR (US);
NANOWATT DESIGN, LLC, Fayetteville, AR (US);
Abstract
A multi-rail module having mutually exclusive outputs. The module includes first and second-rail logic circuits, first and second-rail driver circuits, and a PMOS transistor sourcing Vto both the first and second driver circuits. The first-rail logic circuit is coupled to Vand ground and has a first logic input and a first logic output. The second-rail logic circuit is coupled to Vand ground and has a second logic input and a second logic output. The first-rail driver circuit is coupled to ground, receives the first logic output, and has a first-rail output Q. The second-rail driver circuit is coupled to ground, receives the second logic output, and has a second-rail output Q. The PMOS transistor has a gate driven by a SLEEP signal.