The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2015

Filed:

Oct. 10, 2013
Applicant:

Lsis Co., Ltd., Anyang-si, Gyeonggi-do, KR;

Inventors:

Seung Hyun Bang, Daejeon, KR;

Hae Yong Park, Changwon-si, KR;

Gyeong Ho Lee, Cheongju-si, KR;

Jung Wook Sim, Cheongju-si, KR;

Won Joon Choe, Cheongju-si, KR;

Min Jee Kim, Cheongju-si, KR;

Assignee:

LSIS Co., Ltd., Anyang-Si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); H02H 3/44 (2006.01); H02H 3/093 (2006.01); H02H 9/02 (2006.01);
U.S. Cl.
CPC ...
H02H 3/44 (2013.01); H02H 3/093 (2013.01); H02H 9/02 (2013.01);
Abstract

The fault current detecting circuit includes: a current detection unit that outputs a current detection signal; a first comparing circuit unit that compares the current detection signal with a predetermined reference current value and outputs a first output signal; a differentiator that differentiates the current detection signal to output a change slope of the current detection signal; a second comparing circuit unit that compares the change slope with a predetermined reference change slope value and outputs a second output signal; a third comparing circuit unit that compares the current detection signal with a predetermined current detection limit reference value and output a third output signal; and a trip determining unit that outputs a trip control signal only when the first output signal and the second output signal are maintained to be received and the third output signal is not received.


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