The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2015
Filed:
Mar. 18, 2013
Applicant:
SK Hynix Inc., Icheon-si Gyeonggi-do, KR;
Inventors:
Ji Eun Kim, Suwon-si, KR;
Cheol Ho Joh, Icheon-si, KR;
Hee Min Shin, Seongnam-si, KR;
Kyu Won Lee, Seoul, KR;
Chong Ho Cho, Incheon, KR;
Assignee:
SK Hynix Inc., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/04 (2014.01); H01L 25/065 (2006.01); H01L 25/075 (2006.01); H01L 23/498 (2006.01); H01L 21/683 (2006.01); H01L 25/00 (2006.01); H01L 29/06 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 21/6836 (2013.01); H01L 24/92 (2013.01); H01L 25/043 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/0756 (2013.01); H01L 25/50 (2013.01); H01L 29/0657 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/78 (2013.01); H01L 2221/68327 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49174 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/78346 (2013.01); H01L 2224/92247 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/1531 (2013.01);
Abstract
The semiconductor package includes an upper semiconductor chip stacked on a package substrate and a support layer or a lower semiconductor chip disposed between the upper semiconductor chip and the package substrate. The upper semiconductor chip includes a protrusion downwardly extending from an edge thereof. The protrusion of the upper semiconductor chip is combined with a sidewall of the support layer or the lower semiconductor chip. Related methods are also provided.