The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9093168 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 28, 2015

Filed:

Feb. 21, 2013
Applicant:

Fujitsu Semiconductor Limited, Yokohama-shi, Kanagawa, JP;

Inventor:

Shoichiro Kawashima, Yokahama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); G11C 11/412 (2006.01); G11C 14/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/221 (2013.01); G11C 11/412 (2013.01); G11C 14/0072 (2013.01);
Abstract

A nonvolatile latch circuit includes: a latch circuit part; a charge absorption circuit part; and a first ferroelectric capacitor having a first electrode connected to a plate line and a second electrode connected to the charge absorption circuit part, wherein when information is read from the first ferroelectric capacitor to the latch circuit part, the plate line is operated to cause the charge absorption circuit part to absorb at least part of charges outputted from the first ferroelectric capacitor so as to suppress variation in potential of the second electrode of the first ferroelectric capacitor.


Find Patent Forward Citations

Kawashima, Shoichiro. (2015). Nonvolatile latch circuit and memory device (U.S. Patent No. 9093168). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9093168

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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