The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2015

Filed:

Sep. 27, 2013
Applicant:

Cavium, Inc., San Jose, CA (US);

Inventors:

Omer O. Yildirim, Marlborough, MA (US);

David Lin, Westborough, MA (US);

Scott E. Meninger, Groton, MA (US);

Assignee:

Cavium, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/08 (2006.01); G11C 7/06 (2006.01); G11C 8/18 (2006.01); G11C 8/06 (2006.01); H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G11C 7/06 (2013.01); G11C 8/06 (2013.01); H03F 3/45071 (2013.01);
Abstract

According to at least one example embodiment, a method and corresponding system for calibrating an amplifier offset include applying an input value to both input leads of an amplifier. The amplifier includes one or more digital-to-analog converters (DACs) used to calibrate an offset of the amplifier. A digital value, provided as input to the DAC, is updated over a number of iterations, by a control logic coupled to the amplifier, based on an output of the amplifier. A final value of the digital value being updated, e.g., associated with the last iteration, is employed as input to the DAC of the one or more DACs in the amplifier for calibrating the offset of the amplifier during a data reception phase.


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