The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2015
Filed:
Apr. 23, 2012
Chun Huan Chang, Hsinchu, TW;
Chun-hsin Liu, Hsinchu, TW;
Kun-yueh Lin, Hsinchu, TW;
Ya-ting Lin, Hsinchu, TW;
Chun Huan Chang, Hsinchu, TW;
Chun-Hsin Liu, Hsinchu, TW;
Kun-Yueh Lin, Hsinchu, TW;
Ya-Ting Lin, Hsinchu, TW;
AU Optronics Corporation, Hsinchu, TW;
Abstract
A method for use in a display panel is disclosed. The method includes providing M bus lines in the bus area for receiving a plurality of clock signals, M being a positive integer greater than 3; providing a plurality of signal lines to separately provide the clock signals from the M bus line to the circuit area, the circuit area configured to provide the plurality of sequential gate line signals in response to the clock signals, the plurality of signal lines including a plurality of adjacent signal-line pairs, each adjacent signal-line pair having a resistance difference, said signal lines including a maximum resistance value and a minimum resistance value, and wherein the M bus lines are arranged such that the resistance difference in any one of the adjacent signal-line pairs is smaller than a value difference between the maximum resistance value and the minimum resistance value.