The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Jun. 14, 2013
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Animesh Datta, San Diego, CA (US);

Qi Ye, San Diego, CA (US);

Chih-Lung Kao, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/38 (2006.01); G05B 19/045 (2006.01); H03K 3/037 (2006.01); H03K 3/29 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0375 (2013.01); G05B 19/045 (2013.01); H03K 3/037 (2013.01); H03K 3/29 (2013.01);
Abstract

Techniques for fixing hold violations using metal-programmable cells are described herein. In one embodiment, a system comprises a first flip-flop, a second flip-flop, and a data path between the first and second flip-flops. The system further comprises a metal-programmable cell connected to the data path, wherein the metal-programmable cell is programmed to implement at least one capacitor to add a capacitive load to the data path. The capacitive load adds delay to the data path that prevents a hold violation at one of the first and second flip-flops.


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