The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Sep. 20, 2012
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Takumi Mikawa, Shiga, JP;

Hideaki Murase, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/20 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/16 (2013.01); H01L 27/2409 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/1273 (2013.01); H01L 45/146 (2013.01); H01L 45/1625 (2013.01); H01L 45/1675 (2013.01); H01L 27/2463 (2013.01);
Abstract

A nonvolatile memory element includes: a lower electrode formed above a substrate; a first variable resistance layer formed above the lower electrode and comprising a first metal oxide; a second variable resistance layer formed above the first variable resistance layer and comprising a second metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide; and an upper electrode formed above the second variable resistance layer. A single step is formed in an interface between the first variable resistance layer and the second variable resistance layer. The second variable resistance layer is formed to cover the step and have, above the step, a bend (or stepped portion) covering the step. The bend, seen from above, has only one corner in a surface of the second variable resistance layer.


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