The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Nov. 15, 2012
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Takumi Mikawa, Shiga, JP;

Shinichi Yoneda, Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1266 (2013.01); H01L 27/2481 (2013.01); H01L 45/08 (2013.01); H01L 45/085 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/1608 (2013.01); H01L 45/1675 (2013.01);
Abstract

In a method of manufacturing a variable resistance non-volatile memory device including non-volatile memory element layers stacked together by repeating the step (S, S. . . ) of forming a non-volatile memory element layer plural times, when a thickness of the second metal oxide layer included in each of the non-volatile memory element layers just after the step of forming the corresponding non-volatile memory element layer is completed is a thickness in formation, and when an area of a portion of the second metal oxide layer included in each of the non-volatile memory element layers and a portion of the first metal oxide layer included in the corresponding non-volatile memory element layer, which portions are in contact with each other, just after the step of forming the corresponding non-volatile memory element layer is completed is an area in formation, at least one of the thickness in formation and the area in formation is made different among the steps of forming the non-volatile memory element layers, to cause all of the non-volatile memory elements in a state in which formation of an uppermost non-volatile memory element layer is completed, to have an equal initial resistance.


Find Patent Forward Citations

Loading…