The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Apr. 26, 2011
Barbara Bazer-bachi, Villate, FR;
Mustapha Lemiti, Lyons, FR;
Nam Le Quang, Saint Alban de Roche, FR;
Yvon Pellegrin, Frontignan, FR;
Barbara Bazer-Bachi, Villate, FR;
Mustapha Lemiti, Lyons, FR;
Nam Le Quang, Saint Alban de Roche, FR;
Yvon Pellegrin, Frontignan, FR;
Abstract
The present invention relates to a method for preparing, on a silicon wafer, an n+pp+ or p+nn+ structure which includes the following consecutive steps: a) on a p or n silicon wafer (), which includes a front surface () and a rear surface (), a layer of boron-doped silicon oxide (BSG) () is formed on the rear surface () by PECVD, followed by a SiOdiffusion barrier (); b) a source of phosphorus is diffused such that the phosphorus and the boron co-diffuse and in order also to form: on the front surface () of the wafer obtained at the end of step a), a layer of phosphorus-doped silicon oxide (PSG) () and an n+ doped area (); and on the rear surface of the wafer obtained at the end of step a), a boron-rich area (BRL) (), as well as a p+ doped area (); c) the layers of BSG () and PSG () oxides and SiO() are removed, the BRL () is oxidized and the layer resulting from said oxidation is removed. The invention also relates to a silicon wafer having an n+pp+ or p+nn+ structure, which can be obtained by said preparation method, as well as to a photovoltaic panel manufactured from such a silicon wafer.