The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Dec. 27, 2012
Applicant:
Lg Display Co., Ltd., Seoul, KR;
Inventors:
Ohnam Kwon, Paju-si, KR;
Haeyeol Kim, Goyang-si, KR;
Assignee:
LG Display Co., Ltd., Seoul, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 29/66 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/49 (2006.01); H01L 29/786 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66742 (2013.01); H01L 21/31127 (2013.01); H01L 21/31144 (2013.01); H01L 21/7688 (2013.01); H01L 21/76877 (2013.01); H01L 29/401 (2013.01); H01L 29/42384 (2013.01); H01L 29/458 (2013.01); H01L 29/4908 (2013.01); H01L 29/66765 (2013.01); H01L 29/78603 (2013.01);
Abstract
This document relates to a method of forming low-resistance metal gate and data wirings and a method of manufacturing a thin film transistor using the same. The method of the wiring includes depositing a metal layer on a base layer; exposing a portion of the base layer by removing a portion of the metal layer; forming grooves in the base layer; forming a seed layer in the grooves of the base layer; and forming a wire consisting of the seed layer and a plated layer by plating a plating material on the seed layer formed in the grooves of the base layer.