The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Dec. 02, 2013
Applicant:
Motorola Mobility Llc, Libertyville, IL (US);
Inventor:
Vahid Goudarzi, Coral Springs, FL (US);
Assignee:
Google Technology Holdings LLC, Mountain View, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 23/3128 (2013.01); H01L 23/49827 (2013.01); H01L 24/81 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2223/54486 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1082 (2013.01); H01L 2225/1094 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15331 (2013.01); H01L 2924/1815 (2013.01);
Abstract
A Through Mold Via (TMV) Integrated Circuit (IC) package is provided as a bottom IC package for a TMV Package on Package (POP) configuration. The TMV IC package has an overmold top portion having a substantially flat surface and spacer or standoff features extending upward from the flat surface. The spacer or standoff features are configured to abut the bottom surface of the top POP package during softer reflow in order to maintain a gap of predetermined height between the top and bottom IC packages.