The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2015
Filed:
Feb. 12, 2013
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Balachander Ganesan, San Diego, CA (US);
Ritu Chaba, San Diego, CA (US);
Sei Seung Yoon, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/06 (2006.01); G11C 7/12 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/065 (2013.01); G11C 7/12 (2013.01); G11C 7/18 (2013.01);
Abstract
A memory circuit is provided comprising a plurality of bit cells coupled to a bit line that permits accessing information from each of the plurality of bit cells. A sense inverter is coupled to an output of the bit line. A keeper circuit has an output coupled to the bit line to compensate for current leakage from the plurality of bit cells. The keeper circuit may comprise an n-channel metal-oxide-silicon (NMOS) transistor in series with a p-channel metal-oxide-silicon (PMOS) transistor.