The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Mar. 08, 2011
Applicant:

Chi-ming Chen, Hsinchu, TW;

Inventor:

Chi-Ming Chen, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4291 (2013.01);
Abstract

A bus interface includes a chip select terminal, a first transmission bus terminal, a second transmission bus terminal, and a clock control device. The chip select terminal transmits a chip select signal to start the data transmission. When the data transmission starts, the first transmission bus terminal sends data to the second device, and the second transmission bus terminal sends the data from the second device to the first device. The clock control device includes a frequency processing unit and a transmission clock generating unit. The frequency processing unit outputs a clock control signal when a frequency to set value changes. The transmission clock generating unit receives the clock control signal and generates a transmission clock in accordance with the frequency setting value.


Find Patent Forward Citations

Chen, Chi-Ming. (2015). Integrated circuit and clock frequency control method of integrated circuit (U.S. Patent No. 9081913). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9081913

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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