The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2015

Filed:

Oct. 16, 2012
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Michael Karl Molloy, Round Rock, TX (US);

Mukund P. Khatri, Austin, TX (US);

Robert Wayne Hormuth, Cedar Park, TX (US);

Assignee:

DELL PRODUCTS, L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/06 (2006.01); G06F 9/22 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/5094 (2013.01); G06F 9/223 (2013.01); Y02B 60/142 (2013.01);
Abstract

A method of reducing execution jitter includes a processor having several cores and control logic that receives core configuration parameters. Control logic determines if a first set of cores are selected to be disabled. If none of the cores is selected to be disabled, the control logic determines if a second set of cores is selected to be jitter controlled. If the second set of cores is selected to be jitter controlled, the second set of cores is set to a first operating state. If the first set of cores is selected to be disabled, the control logic determines a second operating state for a third set of enabled cores. The control logic determines if the third set of enabled cores is jitter controlled, and if the third set of enabled cores is jitter controlled, the control logic sets the third set of enabled cores to the second operating state.


Find Patent Forward Citations

Molloy, Michael. (2015). Method for reducing execution jitter in multi-core processors within an information handling system (U.S. Patent No. 9081625). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9081625

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…