The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2015
Filed:
Jan. 28, 2014
Altera Corporation, San Jose, CA (US);
Chi Mun Ho, Bayan Lepas, MY;
Kin Hong Au, Perai, MY;
Altera Corporation, San Jose, CA (US);
Abstract
An integrated circuit having a clock synchronizing circuit is described. The clock synchronizing circuit includes an input-output buffer and a plurality of sampling buffer circuits. The input-output buffer receives an input signal and generating an output signal. Each sampling buffer circuit receives the output signal and a sampling clock signal. Each sampling buffer circuit generates a first sampled output by sampling the output signal at the rising edge of the corresponding sampling clock signal and a second sampled output by sampling the output signal on the falling edge of the corresponding sampling clock signal. The sampling clock signal has a predetermined phase difference at each of the plurality of sampling buffer circuits.