The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Nov. 18, 2013
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

David Alexander Grant, Dallas, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 29/50 (2006.01); G11C 16/00 (2006.01); G11C 17/12 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50016 (2013.01); G11C 16/00 (2013.01); G11C 17/12 (2013.01); G11C 2029/5002 (2013.01);
Abstract

Read margin measurement circuitry for measuring the read margin of floating-gate programmable non-volatile memory cells. In some embodiments, the read margin of a cell with a floating-gate transistor in a non-conductive state is measured by periodically clocking a counter following initiation of a read cycle; a latch stores the counter contents upon the cell under test making a transition due to leakage of the floating-gate transistor. Logic for testing a group of cells in parallel is disclosed. In some embodiments, the read margin of a cell in which the floating-gate transistor is set to a conductive state is measured by repeatedly reading the cell, with the output developing a voltage corresponding to the duty cycle of the output of the read circuit.


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