The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2015
Filed:
Jul. 13, 2012
Applicant:
Akira Ogawa, Tokyo, JP;
Inventor:
Akira Ogawa, Tokyo, JP;
Assignee:
POWERCHIP TECHNOLOGY CORP., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 19/094 (2006.01); G11C 16/06 (2006.01); G11C 16/30 (2006.01); G11C 7/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/06 (2013.01); G11C 16/30 (2013.01); G11C 7/1084 (2013.01); G11C 7/1087 (2013.01);
Abstract
A level shift circuit, for outputting a data output signal with a second level via an output inverter after a data input signal with a first level is stored in a latch, includes a level set circuit, when the output data signal outputs with a low level, setting the output data signal to a low level in response to a change of the input data signal. The level set circuit is connected to an output terminal of the output inverter, and has an NMOS transistor having a drain electrode and a source electrode coupled to a ground, wherein the NMOS transistor turns on in response to the input data signal with a high level.