The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Sep. 14, 2012
Applicants:

Young-chul Cho, Hwaseong-si, KR;

Young-jin Jeon, Hwaseong-si, KR;

Yong-cheol Bae, Yongin-si, KR;

Inventors:

Young-Chul Cho, Hwaseong-si, KR;

Young-Jin Jeon, Hwaseong-si, KR;

Yong-Cheol Bae, Yongin-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01); G11C 7/02 (2006.01); G11C 7/10 (2006.01); G11C 7/20 (2006.01); G11C 5/04 (2006.01);
U.S. Cl.
CPC ...
G11C 5/147 (2013.01); G11C 7/02 (2013.01); G11C 7/1012 (2013.01); G11C 7/1057 (2013.01); G11C 7/20 (2013.01); G11C 5/04 (2013.01); G11C 5/148 (2013.01);
Abstract

A power mixing circuit capable of maintaining a stable output voltage in a deep-power-down mode is provided. The power mixing circuit includes an input buffer, a power mixing control circuit, a power mixing driver and an output buffer. The input buffer is configured to operate using a first supply voltage, and to generate a first voltage signal in response to an input signal. The power mixing control circuit is configured to generate a power mixing control signal based on a power-up signal and a deep-power-down mode signal. The power mixing driver is configured to operate using an external supply voltage and a second supply voltage, to perform power mixing on the external supply voltage and the second supply voltage, and to generate a second voltage signal. The output buffer is configured to operate using the second supply voltage, and to generate an output signal.


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