The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Sep. 13, 2012
Applicants:

Gerald George Pechanek, Cary, NC (US);

Ricardo Rodriguez, Raleigh, NC (US);

Matthew Plonski, Morrisville, NC (US);

David Strube, Raleigh, NC (US);

Kevin Coopman, Redwood City, CA (US);

Inventors:

Gerald George Pechanek, Cary, NC (US);

Ricardo Rodriguez, Raleigh, NC (US);

Matthew Plonski, Morrisville, NC (US);

David Strube, Raleigh, NC (US);

Kevin Coopman, Redwood City, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/15 (2006.01); G06F 17/16 (2006.01); G06F 9/30 (2006.01); G06F 7/48 (2006.01); G06F 9/32 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 7/4812 (2013.01); G06F 17/16 (2013.01); G06F 9/325 (2013.01); G06F 9/3885 (2013.01); G06F 17/15 (2013.01); G06F 2207/3896 (2013.01); G06F 9/30014 (2013.01);
Abstract

Efficient computation of complex long multiplication results and an efficient calculation of a covariance matrix are described. A parallel array VLIW digital signal processor is employed along with specialized complex long multiplication instructions and communication operations between the processing elements which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs may be used allowing the complex multiplication pipeline hardware to be efficiently used.


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