The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2015

Filed:

Jan. 27, 2012
Applicants:

Jae-sung Kim, Suwon-si, KR;

Hoon Kang, Suwon-si, KR;

Jin-young Choi, Incheon, KR;

Inventors:

Jae-Sung Kim, Suwon-si, KR;

Hoon Kang, Suwon-si, KR;

Jin-Young Choi, Incheon, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
G02F 1/13458 (2013.01); H01L 27/124 (2013.01); G02F 1/136227 (2013.01); G02F 2001/134372 (2013.01);
Abstract

A thin film transistor array panel includes: an substrate; a gate line and a gate pad portion disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad portion; a data line and a data pad portion disposed on the gate insulating layer; a gate assistance pad portion disposed at a position corresponding to the gate pad portion; a first insulating layer disposed on the data line and removed at the gate pad portion and the data pad portion; a first field generating electrode disposed on the first insulating layer; a second insulating layer disposed on the first field generating electrode and removed at the gate pad portion and the data pad portion; and a second field generating electrode disposed on the second insulating layer. The assistance gate pad portion and the gate insulating layer include a contact hole exposing the gate pad portion.


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