The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Nov. 17, 2009
Applicants:

Alberto F. Viscarra, Torrance, CA (US);

David T. Winslow, Culver City, CA (US);

Billy D. Ables, Richardson, TX (US);

Kurt S. Ketola, Los Angeles, CA (US);

Kurt J. Krause, Redondo Beach, CA (US);

Kevin C. Rolston, Playa Del Rey, CA (US);

Rohn Sauer, Encino, CA (US);

James R. Chow, San Gabriel, CA (US);

Inventors:

Alberto F. Viscarra, Torrance, CA (US);

David T. Winslow, Culver City, CA (US);

Billy D. Ables, Richardson, TX (US);

Kurt S. Ketola, Los Angeles, CA (US);

Kurt J. Krause, Redondo Beach, CA (US);

Kevin C. Rolston, Playa Del Rey, CA (US);

Rohn Sauer, Encino, CA (US);

James R. Chow, San Gabriel, CA (US);

Assignee:

RAYTHEON COMPANY, Waltham, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 43/00 (2006.01); H05K 3/00 (2006.01); H01Q 21/00 (2006.01); H05K 1/03 (2006.01); H05K 3/06 (2006.01); H05K 3/38 (2006.01);
U.S. Cl.
CPC ...
H05K 3/0014 (2013.01); Y10T 29/49156 (2013.01); Y10T 29/49016 (2013.01); H01Q 21/0087 (2013.01); H05K 1/0393 (2013.01); H05K 3/06 (2013.01); H05K 3/388 (2013.01); H05K 2201/0129 (2013.01); H05K 2201/0141 (2013.01); H05K 2203/0113 (2013.01); H05K 2203/1105 (2013.01); H05K 2203/302 (2013.01);
Abstract

A process for fabricating a three dimensional molded feed structure is provided. In one embodiment, the invention relates to a process for fabricating a three dimensional radio frequency (RF) antenna structure, the process including providing a flexible circuit substrate, forming a first preselected pattern of channels in the flexible circuit substrate, depositing a conductive layer on the formed flexible substrate, and removing portions of the conductive layer to form a plurality of conductive traces.


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