The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
May. 31, 2013
Applicant:
Crest Semiconductors, Inc, San Jose, CA (US);
Inventors:
Tracy Johancsik, Murray, UT (US);
Ryan James Kier, Salt Lake City, UT (US);
Yusuf Haque, Woodside, CA (US);
Assignee:
CREST SEMICONDUCTORS, INC., San Jose, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01); H03M 1/54 (2006.01); H03M 1/10 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/54 (2013.01); H03M 1/1061 (2013.01); H03M 1/1215 (2013.01); H03M 1/1245 (2013.01);
Abstract
A time-interleaved Analog-to-Digital Converter (ADC) includes a set of time multiplexed sub-ADC circuits, each sub-ADC circuit comprising a sample-and-hold circuit. Each sample-and-hold circuit includes a bootstrap circuit for maintaining a constant voltage level between an input terminal of a switch and a gate terminal of the switch, the switch for switching between a track mode and a hold mode, and a capacitor bank associated with the bootstrap circuit such that a setting of the capacitor bank affects the voltage level.