The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Oct. 03, 2014
Applicant:

Vishal P. Trivedi, Chandler, AZ (US);

Inventor:

Vishal P. Trivedi, Chandler, AZ (US);

Assignee:

FREESCALE SEMICONDUCTOR INC., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8249 (2006.01); H01L 27/06 (2006.01); H01L 27/07 (2006.01);
U.S. Cl.
CPC ...
H01L 21/8249 (2013.01); H01L 27/0623 (2013.01); H01L 27/0705 (2013.01);
Abstract

A hybrid transistor is produced to have a substrate with a first (e.g., P type) well region and a second (e.g., N type) well region with an NP or PN junction therebetween. A MOS portion of the hybrid transistor has an (e.g., N type) source region in the first well region and a gate conductor overlying and insulated from the well regions. A drain or anode (D/A) portion in the second well region collects current from the source region, and includes a bipolar transistor having an (e.g., N+) emitter region, a (e.g., P type) base region and a (e.g., N type) collector region laterally separated from the junction. Different LDMOS-like or IGBT-like properties are obtained depending on whether the current is extracted from the hybrid transistor via the bipolar transistor base or emitter or both. The bipolar transistor is desirably a vertical hetero-junction transistor.


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