The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Mar. 07, 2012
Applicants:

Yoshiko Kato, Yokohama, JP;

Masato Endo, Yokohama, JP;

Mitsuhiko Noda, Yokohama, JP;

Mitsuhiro Noguchi, Yokohama, JP;

Inventors:

Yoshiko Kato, Yokohama, JP;

Masato Endo, Yokohama, JP;

Mitsuhiko Noda, Yokohama, JP;

Mitsuhiro Noguchi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/788 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 29/792 (2006.01); H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76229 (2013.01); H01L 29/66825 (2013.01); H01L 29/66833 (2013.01); H01L 29/7881 (2013.01); H01L 29/792 (2013.01); H01L 27/11519 (2013.01); H01L 27/11529 (2013.01); H01L 27/11546 (2013.01); H01L 27/11565 (2013.01); H01L 27/1157 (2013.01); H01L 27/11573 (2013.01);
Abstract

According to one embodiment, a semiconductor memory includes a memory cell in a memory cell array which is provided in a semiconductor substrate and which includes a first active region surrounded by a first isolation insulator, a transistor in a transistor region which is provided in the semiconductor substrate and which includes second active regions surrounded by a second isolation insulator. The second isolation insulator includes a first film, and a second film between the first film and the second active region, and the upper surface of the first film is located closer to the bottom of the semiconductor substrate than the upper surface of the second film.


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