The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Jun. 03, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Jeehwan Kim, Los Angeles, CA (US);

Jin-Hong Park, Gyeonggi-do, KR;

Devendra Sadana, Pleasantville, NY (US);

Kuen-Ting Shiu, White Plalins, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/20 (2006.01); H01L 29/08 (2006.01); H01L 29/417 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 21/285 (2006.01); H01L 21/265 (2006.01); H01L 29/267 (2006.01);
U.S. Cl.
CPC ...
H01L 29/20 (2013.01); H01L 21/26513 (2013.01); H01L 29/0847 (2013.01); H01L 29/41783 (2013.01); H01L 29/452 (2013.01); H01L 29/66522 (2013.01); H01L 29/66628 (2013.01); H01L 29/78 (2013.01); H01L 21/28575 (2013.01); H01L 29/267 (2013.01);
Abstract

Embodiments of this invention provide a method to fabricate an electrical contact. The method includes providing a substrate of a compound Group III-V semiconductor material having at least one electrically conducting doped region adjacent to a surface of the substrate. The method further includes fabricating the electrical contact to the at least one electrically conducting doped region by depositing a single crystal layer of germanium over the surface of the substrate so as to at least partially overlie the at least one electrically conducting doped region, converting the single crystal layer of germanium into a layer of amorphous germanium by implanting a dopant, forming a metal layer over exposed surfaces of the amorphous germanium layer, and performing a metal-induced crystallization (MIC) process on the amorphous germanium layer having the overlying metal layer to convert the amorphous germanium layer to a crystalline germanium layer and to activate the implanted dopant. The electrical contact can be a source or a drain contact of a transistor.


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