The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
Dec. 04, 2013
Applicant:
SK Hynix Inc., Icheon-si, KR;
Inventor:
Hyun Jin Lee, Seongnam-si, KR;
Assignee:
SK Hynix Inc., Icheon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 29/417 (2006.01); H01L 27/108 (2006.01); G11C 11/4097 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/823431 (2013.01); H01L 29/66795 (2013.01); H01L 29/41791 (2013.01); H01L 27/10879 (2013.01); G11C 11/4097 (2013.01);
Abstract
In order to fabricate a semiconductor device, a semiconductor substrate in a peripheral region is etched to form a plurality of holes. A gap-filling material is buried in the holes of the semiconductor substrate in the peripheral region, and first and second device isolation films are formed in the semiconductor device. A fin structure is formed by recessing the gap-filling material, and a gate is formed over a surface including the fin structure. As a result, operation characteristics of transistors formed in the peripheral region are improved and the short channel effects are also reduced.