The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
May. 23, 2014
Applicant:
Renesas Electronics Corporation, Kawasaki, JP;
Inventors:
Yoshiyuki Abe, Tokyo, JP;
Chuichi Miyazaki, Tokyo, JP;
Hideo Mutou, Tokyo, JP;
Tomoko Higashino, Tokyo, JP;
Assignee:
RENESAS ELECTRONICS CORPORATION, Kanagawa, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 23/00 (2006.01); B23K 26/00 (2014.01); B23K 26/40 (2014.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01); H01L 25/065 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); B23K 26/0057 (2013.01); B23K 26/4075 (2013.01); H01L 21/67092 (2013.01); H01L 21/6835 (2013.01); H01L 21/6836 (2013.01); H01L 21/6838 (2013.01); H01L 21/78 (2013.01); H01L 22/34 (2013.01); H01L 23/544 (2013.01); H01L 25/0657 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/6834 (2013.01); H01L 2223/5442 (2013.01); H01L 2223/54426 (2013.01); H01L 2223/5448 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49175 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01077 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/04941 (2013.01); H01L 2924/14 (2013.01); H01L 2924/15311 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); B23K 2201/40 (2013.01); H01L 2924/01019 (2013.01); H01L 23/562 (2013.01); H01L 24/06 (2013.01); H01L 2224/02235 (2013.01); H01L 2224/05553 (2013.01);
Abstract
A semiconductor wafer with modified regions formed in the substrate is provided. A modified region is formed apart from the side of a wafer and a pad is formed over an insulating film, which is formed over the main surface of the substrate of the wafer. Further, the modified region is formed closer to the side surface of the substrate than the pad. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.