The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2015

Filed:

Aug. 07, 2012
Applicants:

Sang Kyun Lee, Gyunggi-do, KR;

Chang Ryul Jung, Seoul, KR;

Sung Ho Lee, Gyunggi-do, KR;

Dong Sup Park, Gyunggi-do, KR;

Yeong Su Cho, Gyunggi-do, KR;

Hyun Chul Jung, Gyunggi-do, KR;

Inventors:

Sang Kyun Lee, Gyunggi-do, KR;

Chang Ryul Jung, Seoul, KR;

Sung Ho Lee, Gyunggi-do, KR;

Dong Sup Park, Gyunggi-do, KR;

Yeong Su Cho, Gyunggi-do, KR;

Hyun Chul Jung, Gyunggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01G 9/00 (2006.01); H01G 9/008 (2006.01); H01G 9/10 (2006.01); H01G 11/74 (2013.01); H01G 11/80 (2013.01); H01G 11/82 (2013.01); H01G 11/84 (2013.01);
U.S. Cl.
CPC ...
H01G 9/155 (2013.01); Y10T 29/417 (2015.01); H01G 9/016 (2013.01); H01G 9/10 (2013.01); H01G 11/74 (2013.01); H01G 11/80 (2013.01); H01G 11/82 (2013.01); H01G 11/84 (2013.01); Y02E 60/13 (2013.01); Y02T 10/7022 (2013.01);
Abstract

A method of manufacturing a chip-type electric double layer capacitor, including: forming a lower case having an opened housing space and first and second external terminals buried therein, the first and second external terminals having first surfaces exposed to the housing space, respectively, and second surfaces exposed to an outer region of the lower case, respectively; mounting an electric double layer capacitor cell in the housing space such that the electric double layer capacitor cell is electrically connected to the first surfaces of the first and second external terminals exposed to the housing space; and mounting an upper cap on the lower case so as to cover the housing space.


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