The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2015
Filed:
Oct. 24, 2012
Arizona Board of Regents, a Body Corporate of the State of Arizona Acting for and on Behalf of Arizona State University, Scottsdale, AZ (US);
Jemmy Sutanto, Scottsdale, AZ (US);
Jitendran Muthuswamy, Chandler, AZ (US);
Arizona Board of Regents on behalf of Arizona State University, Scottsdale, AZ (US);
Abstract
Interconnect and/or reflow methods of the present disclosure achieve high aspect ratio interconnects, for example interconnects having an aspect ratio as high as 4, in addition to wider interconnect height tolerances among interconnects (for example, interconnects having a height variability of up to about 30%) while still achieving reliable electrical connections. Moreover, flip-chip interconnects configured in accordance with principles of the present disclosure can provide improved z-axis spacing between die-to-die and/or die-to-substrate flip chip stacks, for example z-axis spacing as large as 600 μm. In this manner, additional spacing can be achieved for MEMS devices and/or similar components that are extendable and/or deformable out of the die plane.